FIFO is an acronym for First In, First Out, an abstraction in ways of organizing and manipulation of data relative to time and prioritization. This expression describes the principle of a queue processing technique or servicing conflicting demands by ordering process by first-come, first-served (FCFS) behaviour: what comes in first is handled first, what comes in next waits until the first is finished, etc.

     Content-addressable memory (CAM) is a special typeof computer memory used in certain very high speed searching applications. It is also known as associative memory, associative storage, or associative array, although the last term is more often used for a programming data structure. (Hannum et al., 2004) Several custom computers, like the Goodyear STARAN, were built to implement CAM, and were referred to as associative computers.

    Random-access memory (RAM) is a form of computer data storage. Today, it takes the form of integrated circuits (IC) that allow stored data to be accessed in any order (i.e., at random). "Random" refers to the idea that any piece of data can be returned in a constant time, regardless of its physical location and whether or not it is related to the previous piece of data.

     Operation principle

       The following pictures show typical screen shots of the Bartels AutoEngineer® software. The basic BAE user interface is identical on the supported platforms. However, through the User Language which is freely available with every BAE system, the features for customizing the menu layout and adding new functions virtually unlimited. We are encouraging and supporting users in adapting the menu to their special requirements. I.e., customer-specific BAE menus are commonplace...

     Seagate vừa ra mắt mẫu ổ cứng ngoài 3TB đầu tiên trên thế giới (FreeAgent GoFlex Desk). Nếu như xu hướng trước đây thường là ổ cứng trong có dung lượng lớn trước tiên rồi mới đến ổ cứng ngoài, nhưng với ổ Seagate thì quy trình này lại bị đảo ngược. Hãng này đã áp dụng một số công nghệ mới để có được ổ cứng 3TB.

Following is the Verilog code for flip-flop with a positive-edge clock.

	module flop (clk, d, q);
	input  clk, d;
	output q;
	reg    q;

   What is FPGA ?

A field-programmable gate array is a semiconductor device containing programmable logic components called "logic blocks", and programmable interconnects. Logic blocks can be programmed to perform the function of basic logic gates such as AND, and XOR, or more complex combinational functions such as decoders or mathematical functions. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. A hierarchy of programmable interconnects allows logic blocks to be interconnected as needed by the system

    1) Explain about setup time and hold time, what will happen if there is setup time and hold tine violation, how to overcome this?

Set up time is the amount of time before the clock edge that the input signal needs to be stable to guarantee it is accepted properly on the clock edge.
Hold time is the amount of time after the clock edge that same input signal has to be held before changing it to make sure it is sensed properly at the clock edge.

     Timing, an important parameter associated with Sequential Circuit design will be discussed in this tutorial. We will begin with the general concepts associated with timing and then will proceed with examples to better understand their application to digital design. This tutorial consists of three sections.

What is Body effect ?

The threshold voltage of a MOSFET is affected by the voltage which is applied to the back contact. The voltage difference between the source and the bulk, VBS changes the width of the depletion layer and therefore also the voltage across the oxide due to the change of the charge in the depletion region. This results in a difference in threshold voltage which equals the difference in charge in the depletion region divided by the oxide capacitance, yielding:.

   1) What is latch up?

Latch-up pertains to a failure mechanism wherein a parasitic thyristor (such as a parasitic silicon controlled rectifier, or SCR) is inadvertently created within a circuit, causing a high amount of current to continuously flow through it once it is accidentally triggered or turned on. Depending on the circuits involved, the amount of current flow produced by this mechanism can be large enough to result in permanent destruction of the device due to electrical overstress (EOS) .

     1)Explain zener breakdown and avalanche breakdown?

A thermally generated carrier (part of reverse saturation current) falls down the junction barrier and acquires energy from the applied potential. This carriers collides with a crystal ion and imparts sufficient energy to disrupt a covalent bond.In addition to the original carrier, a new electron-hole pair has been generated. These carriers may also pick up sufficient energy and creates still another electron-hole pair.

     1. Lập trình hướng đối tượng là gì?
Lập trình hướng đối tượng (gọi tắt là OOP, từ chữ Anh ngữ object-oriented programming), hay còn gọi là lập trình định hướng đối tượng, là kĩ thuật lập trình hỗ trợ công nghệ đối tượng. OOP được xem là giúp tăng năng suất, đơn giản hóa độ phức tạp khi bảo trì cũng như mở rộng phần mềm bằng cách cho phép lập trình viên tập trung vào các đối tượng phần mềm ở bậc cao hơn.

     MT29F1G08 và MT29F1G16  đều là những thiết bị nhớ 1GB NAND Flash. Công nghệ NAND Flash cung cấp những giải pháp tiên tiến nhất để đáp ứng những đòi hỏi về mật độ lưu trữ cao. Thiết bị MT29F1Gxx sử dụng những đặc điểm của công nghệ NAND Flash được thiết kế để cải thiện cấp hiển thị của hệ thống.