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# Thế giới ASIC

## Sequential Circuits Part-I

Introduction
Digital electronics is classified into combinational logic and sequential logic. Combinational logic output depends on the inputs levels, whereas sequential logic output depends on stored levels and also the input levels

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## Simplification Of Boolean Functions Part-IV

QUINE-McCLUSKEY MINIMIZATION
Quine-McCluskey minimization method uses the same theorem to produce the solution as the K-map method, namely X(Y+Y')=X

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## Simplification Of Boolean Functions Part-III

4-Variable K-Map

There are 16 cells in a 4-variable (W, X, Y, Z); K-map as shown in the figure below.

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## Simplification Of Boolean Functions Part-II

2-Variable K-Map

In any K-Map, each square represents a minterm. Adjacent squares always differ by just one literal (So that the unifying theorem may apply: X + X' = 1). For the 2-variable case (e.g.: variables X, Y), the map can be drawn as below.

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## Simplification Of Boolean Functions Part-I

Introduction
Simplification of Boolean functions is mainly used to reduce the gate count of a design. Less number of gates means less power consumption, sometimes the circuit works faster and also when number of gates is reduced, cost also comes down.

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## GENERATE THE ARRAY OF UNIQUE VALUES WITHOUT USING RANDOM AND CONSTRAINTS

Without using Random variable and constraint, you can generate array of random unique values using below code, but it is not fully random.

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## HOW VIRTUAL INTERFACE CAN BE PASS USING UVM_CONFIG_DB IN THE UVM ENVIRONMENT?

How to connect the DUT to the UVM Testbench??

In our traditional directed Testbench environments, all the components are “static” in nature & information (data/control)

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## IMMEDIATE VS CONCURRENT ASSERTIONS

Immediate assertions use expressions and are executed like a statement in a procedural block. They are not temporal in nature and are evaluated immediately when executed. Immediate assertions are used only in dynamic simulations. Following is an example of a simple immediate assertion that checks “if x and y are always equal”:

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## ASSERTIONS AND ADVANTAGES OF ASSERTIONS

An assertion is used to validate the behavior of the design. If the property that is being checked for in a simulation does not behave as per specification, then the assertion fails.

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## UVM_CONFIG_DB AND UVM_RESOURCE_DB

uvm_resource_db:

uvm_resource_db is base class and uvm_config_db is extended from uvm_resource_db. Using the resource_db requires that the scope (arbitrary string) for the set and get a match.

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## Process In SystemC Part VI

Local Watching
Local watching allows you to specify exactly which section of the process is watching which signals, and where the event handlers are located.

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## Process In SystemC Part V

Global Watching

SC_CTHREAD processes typically have infinite loops that will continuously execute. A designer typically wants some way to initialize the behavior of the loop or jump out of the loop when a condition occurs.

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## Process In SystemC Part IV

dont_initialize()
Process and threads (not the cthreads) get executed automatically in Constrcutor even if event in sensitivity list does not occur. To prevent this unintensional execution, use dont_initialize() function as shown in example.

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## Process In SystemC Part III

SC_CTHREAD process is different from the SC_THREAD process in a number of ways. First the SC_CTHREAD process specifies a clock object.

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## Process In SystemC Part II

Threads are second kind of process, which when called keeps executing or waiting for some event to occur. Conditions that enable this processes can be event triggered, like posedge of clock.

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## Process In SystemC

Introduction

We saw in last chapter basic introduction to Processes. There are three types of processes in SystemC. Processes are not hierarchical, so no process will call another process directly.

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