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AppliedMicro tuyển dụng kỹ sư ASIC

 

     AppliedMicro Corporation is the world-class company in network, embedded system, storage and chip design.

     JOB TITLE: Senior ASIC Design/Verification Engineers (3 positions)

     Duration: from 1st, Oct, 2010 to the end of December, 2010.

     JOB SUMARY:

   • Develop testbench and reference models for block-level and full-chip verification. This work involves working closely with design engineers to create constrained random based test-bench and test cases, to ensure adequate feature and code coverage, and to help resolve test failures. You will have the opportunity to help create reusable verification environments to be used across multiple projects.

   • Develop and implement block level RTL of next generation SoC designs. Responsibilities will include chip/block level functional specifications, RTL logic design, chip/block level synthesis and formal verification 

 

PERSON SPECIFICATION: 

Qualifications

   • BS or MS and 2-10 yrs experience in Electrical Engineering/Computer Engineering or equivalent field with ASIC Verification focus

   • Solid understanding of RTL Design (Verilog preferred)

   • Knowledge of System Verilog Constrained Random test-bench preferred

   • Emulation / silicon validation experience.

   • Strong knowledge of Perl, UNIX shell, or equivalent scripting languages, as well as well as mini-languages such as sed or awk.

   • Good English and Vietnamese communications skills, both verbal and writing.

Additional desirable skills:

Any of the following is highly desirable but not required:
   • Knowledge of PowerPC technology highly desired

   • Experience with System C transaction-level modeling and co-emulation experience strongly desired.

   • Knowledge or working experience on PCI-e/USB/SATA/SRIO interfaces as well as Ethernet and TCP/IP related protocols are plus.

 

Contact Person: Mr Quat Bao

Email: Địa chỉ email này đã được bảo vệ từ spam bots, bạn cần kích hoạt Javascript để xem nó.