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Job code: EHW14-04

– Responsible for DFT design and DFT verification (SOC, MCU, ASIC products) 

• Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics

• At least 3 years’ experience in DFT design/verification or LSI logic design/verification

• Solid understanding about DFT technique: Memory BIST, Logic BIST, Boundary Scan

• Solid knowledge in using EDA tool (ex: Synopsys, Cadence  DFT/Simulation tools)

• High ability in scripting with Perl, TCL, UNIX shell, or equivalent scripting languages

• Have ability in LSI Test cost optimization, balance Test cost and other Cost

• Good written and oral communication & interpersonal skills

• Have good team working skill and good relationship with the others

• Long-term working commitment

Expected starting date: March 1, 2014

We offer a competitive compensation and benefits package. Interested candidates can send applications from now until January 10, 2014 by following ways:

• Apply online below

• E-mail CV to This e-mail address is being protected from spambots. You need JavaScript enabled to view it ; or

• Post CV to:

  Ms. Ho Thi Ngoc Ha

  Human Resource Dept.,

  Renesas Design Vietnam Co., Ltd., Tan Thuan Road,

  Tan Thuan EPZ., Dist. 7, HCMC

* Only short list candidates will be contacted.

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